1. Field of the Invention
This invention relates to the construction of semiconductive devices, and particularly to a novel transistor structure that reduces collector-emitter punch-through problems, thereby improving transistor speed and gain limitations.
2. Prior Art
In the construction of conventional bipolar transistors, the d.c. current gain can be, to a first order, approximated as the ratio of net charge, hence the impurity concentration, of the emitter to that of the base. Since the emitter electrode is always heavily doped, its net charge may be considered as a constant at a given emitter thickness so that the beta of the transistor is increased most effectively by reducing the net charge on the base, i.e., increasing the resistivity of lightly doping the base structure.
Improving the upper frequency limitation of a transistor is most readily accomplished by making the base element very thin or narrow, and by reducing the base spreading resistance and the total effective capacitance associated with the collector-base junction. However, during operation of such a transistor fabricated with a high resistivity base to obtain high beta and a low collector-base capacitance and a very narrow base to increase the frequency limitation, the collector depletion layer may extend through the entire base region into the emitter, thus forming a "punch-through" voltage breakdown and completing a current path between the collector and the emitter. Furthermore, an additional problem is introduced since the narrowing of the base and the high resistivity used, increases the base spreading resistance. In an attempt to obtain a very high amplification and frequency, some transistors are fabricated with the very narrow lightly doped base structures, but these "super-beta" or punch-through transistors must be provided with precise voltage protection to maintain the transistor below its breakdown voltage.